Quantifying the Fault Tolerance of Multiple-Bus Based Systems
This technical report is an extension of the conference paper . It is shown that fault trees for a variety of dependability problems of multiple-bus based computer systems can be found in a conceptually simple systematic way. The fault tree synthesis is based hierarchically on the rooted trees of point-to-point connectivity, derived from the system topology graph. The analysis can then be based on the Shannon decomposition, which allows for massively parallelized CAE work and also for a remarkable degree of hand calculations, not achievable with Markov modeling. Furthermore, also a recent approach based on binary decision diagrams can be used. (The analysis of fault trees is not discussed at any depth in this paper, though.) We consider 4 types of components: processors, memory units, buses, and links between the three, all of which can fail.The new (small) tool FAULTREE used for our analysis is characterized briefly. Our approach has the advantage of using very simple tree processing algorithms only, but it still needs improvements as to computational time complexity. It is not yet useful for networks with hundreds of nodes.
Nutzung und Vervielfältigung:
Alle Rechte vorbehalten